Many electronic circuits are fabricated on printed circuit boards ("PCBs"), whereon numerous electronic components such as integrated circuits ("Ics"), discrete resistors, capacitors, interconnects, and the like are mounted. Design constraints often dictate that PCBs be made ever smaller in size, yet include an ever increasing number of components.
To ensure that the circuits work properly, completed PCBs are electronically probed. Test pads are provided on one or both sides of the PCB during etching, the pads conventionally being about 0.035" diameter and spaced as closely as about 0.065" center-center. These pads are coupled via traces on the PCB to various key signals in the completed electronic circuit. During testing, the PCB is mounted in a test jig that is then activated, whereupon probes are moved into position and held against the appropriate test pads. Signals are then applied via the jig and test probes to the PCB and circuit. Various test pads are probed, and signals thereon measured, to determine whether the completed circuit is functioning properly.
FIG. 1 is a simplified depiction of a typical prior art jig 2, wherein the PCB under test 4 floats resiliently (indicated by double arrow) between a stationary lower probe bed 6 and a movable upper probe bed 8. Probe beds 6, 8 are often termed "bed of nails". As will be described, in the configuration of FIG. 1, alignment between probe beds 6 and 8, and PCB 4 occurs dynamically during jig activation. Lower probe bed 6 includes a plurality of upward facing test probes 10 that will probe targets 12 on the underside of PCB 4, while upper probe bed 8 includes downward facing test probes 14 that will probe targets 16 on the upperside of PCB 4. While FIG. 1 depicts a PCB with probe targets on two sides, PCB 4 may of course be single sided.
For ease of illustration, FIG. 1 does not depict a movable nest plate that is disposed between the lower test bed 6 and the underside of the PCB 4, or a movable upper clamp plate that is disposed between the upper test bed 8 and the upperside of PCB 4. The nest plate and clamp plate have a pattern of holes through which the test probes protrude, and have PCB-facing surfaces that are scalloped to provide clearance for components, solder joints and the like on the PCB. In the prior art jig of FIG. 1, the nest plate and clamp plate have clearance holes through which alignment tooling pins 18 pass to mate with alignment holes 22 in the PCB 4.
Test probes 10, 14 are commercially available units that typically have a nominal diameter of about 0.029", and taper to a spring-loaded point that will contact the intended target. Ideally a test probe is expected to maintain an accuracy of about 2 mils, e.g., to repeatedly contact an intended location on a PCB surrounded by a 1 mil radius. It must be appreciated that PCB process tolerances can result in targets 12, 16 being slightly mis-positioned on the PCB, and/or alignment holes 12 that are slightly mis-positioned. Thus, to reliably align with and contact a target, test probe accuracy must account for tolerance uncertainties in the location of the targets and the alignment openings themselves.
Lower probe bed 6 is firmly attached to the fixture lower frame 16, to which frame tooling pins 18 are affixed and protrude upwardly. Pins 18 protrude through holes 20 in lower probe bed 6, through holes 22 in PCB 4, and through holes 24 in the upper test bed 8 to dynamically anchor and align probe beds 6 and 8 and PCB 4. When pins 18 are new, they align relatively well with corresponding alignments holes 20, 22, 24. However after jig 2 has tested a sufficient number of PCB units 4 (e.g., several hundred or several thousand), the cumulative friction from mounting and removing PCBs 4 abrades and wears away the outer diameter of tooling pins 18. Unfortunately, as wear and tear reduces the diameter of pins 18, the alignment between test beds 6 and 8, and PCB 4 becomes looser, and the jig test probes may miss contacting their intended targets on the PCB.
After test beds 6, 8 and PCB 4 are aligned, the upper lid 26 of jig 2 is hingedly closed. A mechanism 28 creates a vacuum within jig 2, simultaneously pulling upper test bed 8 against PCB 4 and pulling PCB 4 down against lower test bed 6. Actuation also closes upper lid 26, which is forcibly aligned to the lower frame 16 by a dynamic mating engagement between bushings 40 in lid 26, and frame anchor stakes 30 in lower frame 16. Unfortunately vacuum actuation can pull particulate matter in the air into prior art test jig 2. The particulate matter can contaminate the test jig 2 and PCB 4, while the flowing air stream can produce static electric fields that can damage ICs 32.
Further, vacuum systems tend to allow PCB to "waffle" while settling against lower test bed 6 and upper test bed 8, e.g., to permit PCB 4 to attempt to rotate relative to the lower test bed instead of approaching the test bed (and the protruding probes) in a parallel orientation. It is understood that the pattern of test probe locations on the test beds 6, 8 is dictated by the location of targets on the PCB to be probed. For example, in FIG. 1, lower test bed 6 is shown with a substantial number of test probes 10 along the near edge, and not elsewhere. Thus, as PCB 4 begins to settle against lower test bed 6, the near edge 34 of PCB 4 will tend to rotate upward relative to the far edge 36. Further, because upper test bed 8 has a plurality of test probes 14 at the far edge and not elsewhere, PCB 4 is encouraged to move such that near edge 34 rotates upward and far edge 36 rotates downward. This attempted rotation and resultant non-parallelism is undesired and can cause probes to misalign relative to their intended targets with the result that target probing does not occur. In some instances, waffling is sufficiently severe to warp the PCB, causing solder bonds and/or traces to crack.
The floating PCB, dynamically anchored structure of FIG. 1 is intrinsically unstable because the PCB is able to move slightly in response to unbalanced force from above or below. Because the PCB can move, it will be appreciated that the tolerance between tooling pins 18 and alignment holes 20, 22, 24, and between anchor stakes 30 and bushings 40 is relatively great.
The vacuum compression of jig 2 forces upper test bed 8 to seek proper alignment relative to frame anchor stakes 30, which stakes mate or register with bushings 40 in upper lid 26. As such, stakes 30 dynamically seek alignment with bushings 40 every time a PCB is tested, and the resultant friction can loosen the stake-bushing tolerance, contributing to probe misalignment. By way of example, assume that the mating of stakes 40 and bushings 30 will force edge 36 of upper test bed 8 to move slightly rightward. This brute force realignment will create a sideload on probes 14, dragging them rightward against the upper surface of PCB 4. As a result, the probe tips will bend or deflect leftward, perhaps sufficiently to cause the probe to misalign (e.g., not to contact) the intended target. Because the probes tips can swivel 360.degree., on subsequent measurements a bent probe tip can miss its intended target by a deflection distance in any direction. In addition to causing misalignment, sideloading can result in premature test probe breakage. While the replacement cost of an individual probe is small, the jig downtime to replace a probe can be substantial.
Prior art test jigs 2 generally do not function in a sequential fashion, but rather cause the upper and lower test beds to essentially simultaneously seek proper alignment and attempt to anchor the PCB under test. As noted, this mode of operation undesirably can produce test probe sideloading. Removing PCB 4 from jig 2 can be troublesome where, in an attempt to minimize misalignment, there is an especially tight fit between alignment tool pins 18 and holes 22. In such instances the PCB must be forcibly pried out of the jig, and stress damage to the PCB and/or components thereon can result.
Despite misalignment problems stemming from dynamic abrasion of tooling pins 18, from waffling that can cause misalignment, from vacuum created static electricity, and from sideloading of upper test bed probes, jigs such as depicted in FIG. 1 have been widely used in industry. However as PCBs become more densely populated with components, targets 12, 16 are, of necessity, being downsized.
While jigs 2 may function with 0.035" targets that can have 0.050" or larger center-center spacing, misalignment can occur after as few as several hundred cycles. For example, after only 300 cycles, tests by applicants of a prior art jig 2 disclosed average alignment errors of about 5.6 mils (e.g., 0.0056") on the PCB underside, and about 8.2 mils on the upperside. Further, the maximum scatter pattern (e.g., the pattern of actual contact by the test probes) was about 15.6 mils on the PCB underside and 21.6 mils on the PCB upperside. Unfortunately where newer PCBs include targets having 0.025" diameter spaced 0.050" or so, prior art jigs cannot reliably maintain the desired degree of alignment between test probe and target. Further, the prior art structure of FIG. 1 requires substantial retooling to accommodate a PCB with a different test probe pattern. Essentially, the entire jig 2 is dedicated to a specifically configured PCB.
What is needed is a test jig that can reliably maintain alignment between test probes and targets smaller than 0.035" diameter. Such jig should maintain the requisite degree of alignment over many operation cycles (e.g., several hundred thousand cycles, or more) and should not result in premature replacement of the test probes. Preferably such a test jig should avoid vacuum activation and the contamination and static electricity problems associated therewith. Such a test jig preferably should provide static alignment, be self-sequencing in its operation, and be readily adaptable to testing different PCBs. Finally, such a test jig should provide a mechanism for ejecting tight fitting PCBs from the jig after probing. The present invention discloses such a jig and a method of PCB probing using such a jig.